Hsinchu, Taiwan

Wei-Yu Chen 陳威佑

Electrical Engineer · Analog Circuit Design · High-Frequency Simulation · Silicon Photonics

About

A Little About Me

Raised in the Wind

Born and raised in Hsinchu—a city at the heart of Taiwan’s semiconductor industry, where the wind is less weather and more a way of life. Outside engineering, I follow Williams Racing in Formula 1 and the Uni-Lions in the CPBL.

Education

National Yang Ming Chiao Tung University

B.S. in Electronics and Electrical Engineering · Sep 2022 — Jun 2026

Academic Excellence Award for a Top 5% student among 267 students, Spring 2025.

Experience

BE Epitaxy Semiconductor Technology

Intern, Simulation and Layout Team · Hsinchu, Taiwan

  • Lead MZM RF simulation for a 1.6 Tb/s silicon-photonics project, developing HFSS traveling-wave electrode models and extracting frequency-dependent distributed RLGC and propagation parameters.
  • Combine HFSS-derived RLGC with p–n junction R/C from colleagues’ CHARGE simulations to model loaded electrodes, extract characteristic impedance and RF attenuation, and quantify velocity mismatch against optical group-index data.
  • Developed a Python two-line transfer-matrix workflow that predicts full-length S-parameters from two short HFSS models while preserving fixed launch and terminal effects. Validated the 3 mm prediction against direct HFSS simulation over 1–60 GHz: 0.35 dB S21-magnitude RMSE and 3.42° relative S21-phase RMSE, with simulation time reduced from about 48 hours to 1.5 hours (32×).

National Yang Ming Chiao Tung University

Teaching Assistant, Biomedical Engineering Laboratory · Prof. Charles T. M. Choi

  • Guided 18 students across six teams in building and testing EEG, ECG, and EMG front ends, including instrumentation amplifiers and driven-right-leg circuits.
  • Troubleshot circuits and measurements using oscilloscopes, function generators, and NI ELVIS; debugged LabVIEW acquisition, filtering, and FFT analysis, and independently graded assigned laboratory reports.

National Yang Ming Chiao Tung University

Undergraduate Researcher, Analog Integrated Circuits Laboratory · Prof. Chung-Chih Hung

  • Co-designed a biomedical folded-cascode operational amplifier and a 16 nm FinFET current-mode bandgap reference, with work spanning device sizing, feedback-loop design, and PVT verification.

Lam Research

Intern, Taiwan Field Service Engineering · Houli, Taiwan

  • Supported field-service engineers during etch-equipment commissioning at Micron’s Houli fab, assembling and installing mechanical components for wafer-handling robot alignment under cleanroom and equipment-safety protocols.

Tzu Chi Refurbished Computer Deployment Program

Volunteer Technician · University Service-Learning Program

  • Installed and configured refurbished computers for Indigenous families and other underserved households in rural Taiwan, and provided hands-on instruction in basic operation and maintenance.

Projects

Full-Chip 200 mA Low-Dropout Regulator

Analog Integrated Circuits Laboratory · 0.18 μm CMOS

  • Independently designed a 1.5 V output LDO from transistor sizing through full-chip layout and parasitic extraction in UMC 0.18 μm CMOS, integrating a self-biased bandgap reference, two-stage error amplifier, and PMOS pass device.
  • Diagnosed a post-layout output collapse to 0.65 V at 100 mA as routing IR drop, then rebuilt high-current paths with three or more metal layers and dense vias. Added Kelvin feedback sensing and dedicated pad-to-block supply routing to resolve load-dependent regulation error.
  • Achieved a post-layout output of 1.502 V at 100 mA, 91.96 mV/A load regulation across 1–200 mA, a maximum transient deviation of 5.49 mV, and 82.37% power efficiency at 1.8 V and 100 mA.

Process-Robust FinFET Bandgap Reference

Analog IC Design · 16 nm FinFET

  • Co-designed a 600 mV current-mode reference and led PVT verification across TT, SS, and FF corners over 1.08–1.32 V and −20 to 120 °C. Designed its Miller-compensated two-stage amplifier with 75.4 dB DC gain and 60.1° phase margin.
  • Traced cross-corner reference drift to finite PMOS-mirror output resistance and the process resistor’s positive temperature coefficient, then implemented stacked PMOS mirrors and rederived PTAT/CTAT scaling.
  • At 1.2 V, achieved a worst-case simulated temperature coefficient of 16.8 ppm/°C over −20 to 120 °C, a 3.9 mV reference-voltage spread at 25 °C, and a maximum static current of 89.7 μA across the three process corners.

LiDAR Motion-Capture Data Pipeline

Computer Vision and Spatial Data · NYCU

  • Built a motion-capture pipeline that synchronized Intel RealSense L515 RGB and depth data using nearest-neighbor timestamps, then combined MediaPipe Pose with camera intrinsics to reconstruct 2D landmarks as 3D joint trajectories.

Biomedical Folded-Cascode Op Amp

0.18 μm CMOS · HSPICE

  • Co-designed a biomedical analog-front-end amplifier under a 1.8 V supply and 2 pF load, refining device sizing and bias currents in HSPICE to balance gain, stability, and output swing.
  • Achieved 82.4 dB DC gain, 45.8 kHz gain-bandwidth product, 74.8° phase margin, 0.773 Vpp output swing, and 0.988 μW simulated power at TT and 25 °C.

32-Bit Pipelined MIPS-Like CPU

Computer Organization · Verilog RTL

  • Implemented and verified non-pipelined and pipelined 32-bit MIPS-like CPUs in Verilog, supporting a 19-instruction ISA with arithmetic, logical, load/store, branch, and jump operations, a 32-register file, and 4,096 × 32-bit data memory.

AI-Driven Thermal Comfort Control

Biomedical Engineering Laboratory

  • Integrated a discrete breadboard circuit with an Arduino-based data-acquisition system and an LSTM model, reaching approximately 1% prediction error.

Skills

IC Design and Simulation

  • Cadence Virtuoso
  • Spectre
  • HSPICE
  • LTspice
  • Calibre
  • Ansys HFSS
  • KLayout

Programming

  • Python
  • NumPy
  • SciPy
  • Pandas
  • C
  • C++
  • SystemC
  • Verilog

Focus

  • Analog circuit design
  • High-frequency simulation
  • Silicon photonics

Laboratory

  • Oscilloscope
  • Function generator
  • Digital multimeter
  • VNA
  • LabVIEW
  • Arduino
  • MCU interfacing

CV

A concise downloadable CV will be available here when it is ready.

Download CV

Contact

Location

Hsinchu, Taiwan